| |
| 2008 | ||
|---|---|---|
| 2 | EE | Jeff Mueller, Resve A. Saleh: A Tunable Clock Buffer for Intra-die PVT Compensation in Single-Edge Clock (SEC) Distribution Networks. ISQED 2008: 572-577 |
| 1 | EE | Jeff Mueller, Resve Saleh: Single Edge Clock (SEC) Distribution for Improved Latency, Skew, and Jitter Performance. VLSI Design 2008: 214-219 |
| 1 | Resve A. Saleh (Resve Saleh, Res Saleh) | [1] [2] |