| |
| 2004 | ||
|---|---|---|
| 1 | EE | Mohammad H. Tehranipour, Seid Mehdi Fakhraie, Zainalabedin Navabi, M. R. Movahedin: A Low-Cost At-Speed BIST Architecture for Embedded Processor and SRAM Cores. J. Electronic Testing 20(2): 155-168 (2004) |
| 1 | Seid Mehdi Fakhraie | [1] |
| 2 | Zainalabedin Navabi | [1] |
| 3 | Mohammad H. Tehranipour | [1] |