| 2002 |
|---|
| 7 | EE | Masahiro Sakamoto,
Daisuke Hamano,
Mititada Morisue:
Design of a multiple-operand redundant binary adder.
Systems and Computers in Japan 33(10): 1-9 (2002) |
| 2001 |
|---|
| 6 | EE | Osamu Yamagata,
Nobuhiro Kataoka,
Kazuhiko Tsuda,
Mititada Morisue:
Method of Visualizing Homepages Using Certain Quantifiers and Its Verification.
ICOIN 2001: 137-144 |
| 2000 |
|---|
| 5 | EE | Takeshi Kamio,
Shinichiro Tanaka,
Mititada Morisue:
Backpropagation Algorithm for Logic Oriented Neural Networks.
IJCNN (2) 2000: 123-128 |
| 4 | EE | Kazuhiko Tsuda,
Osamu Yamagata,
Mititada Morisue:
Shopping-chances in Web-pages discovered from user's access logs.
KES 2000: 800-803 |
| 1998 |
|---|
| 3 | EE | Mititada Morisue,
Jun Endo,
Toshimitu Morooka,
Nobuhiro Shimizu,
Masahiro Sakamoto:
A Josephson Ternary Memory Circuit.
ISMVL 1998: 19-24 |
| 2 | | Ali Massoud Haidar,
Mititada Morisue:
Multiple-Valued Logic Oriented Neural Networks.
NC 1998: 979-982 |
| 1992 |
|---|
| 1 | | Mititada Morisue,
Fu-Qiang Li:
A Superconducting Ternary Systolic Array Processor.
ISMVL 1992: 10-17 |
