| |
| 2004 | ||
|---|---|---|
| 3 | Masahiro Sakamoto, Shuusaku Mizukami, Daisuke Hamano, Hisato Fujisaka: A design of 4-operand redundant binary parallel adder using neuron MOS. ISCAS (2) 2004: 793-796 | |
| 2 | Hisato Fujisaka, Daisuke Hamano, Masahiro Sakamoto, Takeshi Kamio: A binary-quantized pseudo-diffusion system. ISCAS (4) 2004: 720-723 | |
| 2002 | ||
| 1 | EE | Masahiro Sakamoto, Daisuke Hamano, Mititada Morisue: Design of a multiple-operand redundant binary adder. Systems and Computers in Japan 33(10): 1-9 (2002) |
| 1 | Hisato Fujisaka | [2] [3] |
| 2 | Takeshi Kamio | [2] |
| 3 | Shuusaku Mizukami | [3] |
| 4 | Mititada Morisue | [1] |
| 5 | Masahiro Sakamoto | [1] [2] [3] |