| |
| 2005 | ||
|---|---|---|
| 2 | EE | Stéphane Simard, Rachid Beguenane, Éric Larouche, Luc Morin: A 2005 review of FPGA arithmetic (abstract only). FPGA 2005: 276 |
| 2004 | ||
| 1 | Luc Morin, Rachid Beguenane, Stéphane Simard, Éric Larouche: A new bit-serial multiplier architecture for area-efficient fpga implementation. Circuits, Signals, and Systems 2004: 333-338 | |
| 1 | Rachid Beguenane | [1] [2] |
| 2 | Éric Larouche | [1] [2] |
| 3 | Stéphane Simard | [1] [2] |