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Éric Larouche

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2005
2EEStéphane Simard, Rachid Beguenane, Éric Larouche, Luc Morin: A 2005 review of FPGA arithmetic (abstract only). FPGA 2005: 276
2004
1 Luc Morin, Rachid Beguenane, Stéphane Simard, Éric Larouche: A new bit-serial multiplier architecture for area-efficient fpga implementation. Circuits, Signals, and Systems 2004: 333-338

Coauthor Index

1Rachid Beguenane [1] [2]
2Luc Morin [1] [2]
3Stéphane Simard [1] [2]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)