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Masao Morimoto

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2007
3EEMasao Morimoto, Makoto Nagata, Kazuo Taki: Asymmetric Slope Dual Mode Differential Logic Circuit for Compatibility of Low-Power and High-Speed Operations. IEICE Transactions 90-C(4): 675-682 (2007)
2005
2EEMasao Morimoto, Yoshinori Tanaka, Makoto Nagata, Kazuo Taki: Logic Synthesis Technique for High Speed Differential Dynamic Logic with Asymmetric Slope Transition. IEICE Transactions 88-A(12): 3324-3331 (2005)
1EEMasao Morimoto, Makoto Nagata, Kazuo Taki: High-Speed Digital Circuit Design Using Differential Logic with Asymmetric Signal Transition. IEICE Transactions 88-C(10): 2001-2008 (2005)

Coauthor Index

1Makoto Nagata [1] [2] [3]
2Kazuo Taki [1] [2] [3]
3Yoshinori Tanaka [2]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)