J. C. Mo

List of publications from the DBLP Bibliography Server - FAQ

1998

1 EE S. K. Misra, R. K. Kolagotla, Hosahalli R. Srinivas, J. C. Mo, M. S. Diamondstein: VLSI Implementation of a 300-MHz 0.35 um CMOS 32-bit Auto-Reloadable Binary Synchronous Counter with Optimal Test Overhead Delay. VLSI Design 1998: 326-329

1998
1	EE	S. K. Misra, R. K. Kolagotla, Hosahalli R. Srinivas, J. C. Mo, M. S. Diamondstein: VLSI Implementation of a 300-MHz 0.35 um CMOS 32-bit Auto-Reloadable Binary Synchronous Counter with Optimal Test Overhead Delay. VLSI Design 1998: 326-329

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