2007 |
11 | EE | Milena Milenkovic,
Aleksandar Milenkovic,
Martin Burtscher:
Algorithms and Hardware Structures for Unobtrusive Real-Time Compression of Instruction and Data Address Traces.
DCC 2007: 283-292 |
10 | EE | Austin Rogers,
Milena Milenkovic,
Aleksandar Milenkovic:
A low overhead hardware technique for software integrity and confidentiality.
ICCD 2007: 113-120 |
9 | EE | Aleksandar Milenkovic,
Milena Milenkovic:
An efficient single-pass trace compression technique utilizing instruction streams.
ACM Trans. Model. Comput. Simul. 17(1): (2007) |
2006 |
8 | EE | Aleksandar Milenkovic,
Milena Milenkovic,
Emil Jovanov:
An efficient runtime instruction block verification for secure embedded systems.
J. Embedded Computing 2(1): 57-76 (2006) |
2005 |
7 | EE | Milena Milenkovic,
Aleksandar Milenkovic,
Emil Jovanov:
Hardware support for code integrity in embedded processors.
CASES 2005: 55-65 |
6 | EE | Milena Milenkovic,
Aleksandar Milenkovic,
Emil Jovanov:
Using instruction block signatures to counter code injection attacks.
SIGARCH Computer Architecture News 33(1): 108-117 (2005) |
2004 |
5 | EE | Milena Milenkovic,
Aleksandar Milenkovic,
Emil Jovanov:
A framework for trusted instruction execution via basic block signature verification.
ACM Southeast Regional Conference 2004: 191-196 |
4 | EE | Hussein Al-Zoubi,
Aleksandar Milenkovic,
Milena Milenkovic:
Performance evaluation of cache replacement policies for the SPEC CPU2000 benchmark suite.
ACM Southeast Regional Conference 2004: 267-272 |
3 | EE | Milena Milenkovic,
Aleksandar Milenkovic,
Jeffrey H. Kulick:
Microbenchmarks for determining branch predictor organization.
Softw., Pract. Exper. 34(5): 465-487 (2004) |
2003 |
2 | | Aleksandar Milenkovic,
Milena Milenkovic,
Jeffrey H. Kulick:
N-Tuple Compression: A Novel Method for Compression of Branch Instruction Traces.
ISCA PDCS 2003: 49-54 |
1 | EE | Aleksandar Milenkovic,
Milena Milenkovic:
Stream-Based Trace Compression.
Computer Architecture Letters 2: (2003) |