| |
| 2000 | ||
|---|---|---|
| 1 | EE | Vikas Mehrotra, Shiou Lin Sam, Duane S. Boning, Anantha Chandrakasan, Rakesh Vallishayee, Sani R. Nassif: A methodology for modeling the effects of systematic within-die interconnect and device variation on circuit performance. DAC 2000: 172-175 |
| 1 | Duane S. Boning | [1] |
| 2 | Anantha Chandrakasan (Anantha P. Chandrakasan) | [1] |
| 3 | Sani R. Nassif | [1] |
| 4 | Shiou Lin Sam | [1] |
| 5 | Rakesh Vallishayee | [1] |