2007 |
4 | EE | E. Barajas,
R. Cosculluela,
D. Coutinho,
D. Mateo,
J. L. González,
I. Cairò,
S. Banda,
M. Ikeda:
Interactive presentation: Behavioral modeling of delay-locked loops and its application to jitter optimization in ultra wide-band impulse radio systems.
DATE 2007: 1430-1435 |
3 | EE | D. Mateo,
Josep Altet,
E. Aldrete-Vidrio:
Electrical characterization of analogue and RF integrated circuits by thermal measurements.
Microelectronics Journal 38(2): 151-156 (2007) |
2006 |
2 | EE | Josep Altet,
D. Mateo,
J. L. González,
E. Aldrete-Vidrio:
Observation of high-frequency analog/RF electrical circuit characteristics by on-chip thermal measurements.
ISCAS 2006 |
1995 |
1 | EE | J. A. Segura,
M. Roca,
D. Mateo,
A. Rubio:
An approach to dynamic power consumption current testing of CMOS ICs.
VTS 1995: 95-100 |