| |
| 2008 | ||
|---|---|---|
| 2 | EE | Tomokazu Yoneda, Kimihiko Masuda, Hideo Fujiwara: Test Scheduling for Multi-Clock Domain SoCs under Power Constraint. IEICE Transactions 91-D(3): 747-755 (2008) |
| 2006 | ||
| 1 | EE | Tomokazu Yoneda, Kimihiko Masuda, Hideo Fujiwara: Power-constrained test scheduling for multi-clock domain SoCs. DATE 2006: 297-302 |
| 1 | Hideo Fujiwara | [1] [2] |
| 2 | Tomokazu Yoneda | [1] [2] |