1996 |
12 | | Swapna S. Gokhale,
Peter N. Marinos,
Kishor S. Trivedi:
Important Milestones in Software Reliability Modeling.
SEKE 1996: 345-352 |
1992 |
11 | | Silvio Bou-Ghazale,
Peter N. Marinos:
Testing with Correlated Test Vectors.
FTCS 1992: 254-262 |
1991 |
10 | | R. Raina,
Peter N. Marinos:
Signature Analysis with Modified Linear Feedback Shift Registers (M-LFSRs).
FTCS 1991: 88-95 |
1988 |
9 | | Peter N. Marinos:
The Non-Linear Feedback Shift-Register as a Built-In Self-Test (BIST) Resource.
ITC 1988: 998 |
8 | | Nagesh Vasanthavada,
Peter N. Marinos:
Synchronization of Fault-Tolerant Clocks in the Presence of Malicious Failures.
IEEE Trans. Computers 37(4): 440-448 (1988) |
1986 |
7 | | Nick Kanopoulos,
Peter N. Marinos:
A High-Performance Single-Chip VLSI Signal Processor Architecture.
Aegean Workshop on Computing 1986: 166-179 |
6 | | Nagesh Vasanthavada,
Peter N. Marinos,
Gerald S. Mersten:
Testing of Fault-Tolerant Clock Systems.
ITC 1986: 901-907 |
5 | | Günhan Kildiran,
Peter N. Marinos:
Functional Testing of Microprocessor-like Architectures.
ITC 1986: 913-920 |
1985 |
4 | | Nagesh Vasanthavada,
Peter N. Marinos:
An Operationally Efficient Scheme for Exhaustive Test-Pattern Generation Using Linear Codes.
ITC 1985: 476-482 |
1978 |
3 | EE | Kevin W. Bowyer,
Peter N. Marinos:
Proposal For A Shared Resource Computing Utility.
ACM Annual Conference (1) 1978: 351-356 |
1977 |
2 | | Edward W. Page,
Peter N. Marinos:
Programmable Array Realizations of Synchronous Sequential Machines.
IEEE Trans. Computers 26(8): 811-818 (1977) |
1976 |
1 | | Peter N. Marinos:
Author's Reply.
IEEE Trans. Computers 25(10): 1056 (1976) |