Yung-Hsiang Lin

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2003

1 EE Kuo-Hsing Cheng, Yung-Hsiang Lin: A dual-pulse-clock double edge triggered flip-flop for low voltage and high speed application. ISCAS (5) 2003: 425-428

2003
1	EE	Kuo-Hsing Cheng, Yung-Hsiang Lin: A dual-pulse-clock double edge triggered flip-flop for low voltage and high speed application. ISCAS (5) 2003: 425-428

Coauthor Index

1 Kuo-Hsing Cheng [1]