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Jiang Lin

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2008
9EEJiang Lin, Qingda Lu, Xiaoning Ding, Zhao Zhang, Xiaodong Zhang, P. Sadayappan: Gaining insights into multicore cache partitioning: Bridging the gap between simulation and real systems. HPCA 2008: 367-378
8EEHongzhong Zheng, Jiang Lin, Zhao Zhang, Zhichun Zhu: Memory Access Scheduling Schemes for Systems with Multi-Core Processors. ICPP 2008: 406-413
7EEHongzhong Zheng, Jiang Lin, Zhao Zhang, Eugene Gorbatov, Howard David, Zhichun Zhu: Mini-rank: Adaptive DRAM architecture for improving memory power efficiency. MICRO 2008: 210-221
6EEJiang Lin, Hongzhong Zheng, Zhichun Zhu, Eugene Gorbatov, Howard David, Zhao Zhang: Software thermal management of dram memory for multicore systems. SIGMETRICS 2008: 337-348
2007
5EEYaqiang Ding, Jiang Lin, Yi Wang, Fuhuei Lin, Yi Kang: A Scheme for System Multiplexing and Program Component Identification. ICME 2007: 583-586
4EEJiang Lin, Hongzhong Zheng, Zhichun Zhu, Howard David, Zhao Zhang: Thermal modeling and management of DRAM memory systems. ISCA 2007: 312-322
3EEJiang Lin, Hongzhong Zheng, Zhichun Zhu, Zhao Zhang, Howard David: DRAM-Level Prefetching for Fully-Buffered DIMM: Design, Performance and Power Saving. ISPASS 2007: 94-104
2005
2EEWei Huang, Jiang Lin, Zhao Zhang, J. Morris Chang: Performance Characterization of Java Applications on SMT Processors. ISPASS 2005: 102-111
1EEWei Huang, Jiang Lin, Zhao Zhang, J. Morris Chang: Towards Pairing Java Applications on SMT Processors. MASCOTS 2005: 7-14

Coauthor Index

1J. Morris Chang [1] [2]
2Howard David [3] [4] [6] [7]
3Xiaoning Ding [9]
4Yaqiang Ding [5]
5Eugene Gorbatov [6] [7]
6Wei Huang [1] [2]
7Yi Kang [5]
8Fuhuei Lin [5]
9Qingda Lu [9]
10P. Sadayappan [9]
11Yi Wang [5]
12Xiaodong Zhang [9]
13Zhao Zhang [1] [2] [3] [4] [6] [7] [8] [9]
14Hongzhong Zheng [3] [4] [6] [7] [8]
15Zhichun Zhu [3] [4] [6] [7] [8]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)