Sheng-Chiech Liang

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1992

3 Sy-Yen Kuo, Sheng-Chiech Liang: Concurrent Error Detection and Correction in Real-Time Systolic Sorting Arrays. IEEE Trans. Computers 41(12): 1615-1620 (1992)

1991

2 Sy-Yen Kuo, Ahmed Louri, Sheng-Chiech Liang: Design and Evaluation of Fault-Tolerant Interleaved Memory Systems. ICPP (1) 1991: 188-195

1 Sy-Yen Kuo, Sheng-Chiech Liang: Efficient Parallel Sorting and Merging Algorithms for Two-Dimensional Mesh-Connected Processor Arrays. ICPP (3) 1991: 66-69

1992
3		Sy-Yen Kuo, Sheng-Chiech Liang: Concurrent Error Detection and Correction in Real-Time Systolic Sorting Arrays. IEEE Trans. Computers 41(12): 1615-1620 (1992)
1991
2		Sy-Yen Kuo, Ahmed Louri, Sheng-Chiech Liang: Design and Evaluation of Fault-Tolerant Interleaved Memory Systems. ICPP (1) 1991: 188-195
1		Sy-Yen Kuo, Sheng-Chiech Liang: Efficient Parallel Sorting and Merging Algorithms for Two-Dimensional Mesh-Connected Processor Arrays. ICPP (3) 1991: 66-69

Coauthor Index

1 Sy-Yen Kuo [1] [2] [3]

2 Ahmed Louri [2]