| |
| 2008 | ||
|---|---|---|
| 2 | EE | Chung-Yi Li, Chih-Feng Chien, Jin-Hua Hong, Tsin-Yuan Chang: An Efficient Area-Delay Product Design for MixColumns/InvMixColumns in AES. ISVLSI 2008: 503-506 |
| 2006 | ||
| 1 | EE | Chung-Yi Li, Jiung-Sheng Chen, Tsin-Yuan Chang: A chaos-based pseudo random number generator using timing-based reseeding method. ISCAS 2006 |
| 1 | Tsin-Yuan Chang | [1] [2] |
| 2 | Jiung-Sheng Chen | [1] |
| 3 | Chih-Feng Chien | [2] |
| 4 | Jin-Hua Hong | [2] |