| |
| 2006 | ||
|---|---|---|
| 4 | EE | Jérôme Lemaitre, Ed F. Deprettere: FPGA Implementation of a Prototype Hierarchical Control Network for Large-Scale Signal Processing Applications. Euro-Par 2006: 1192-1203 |
| 3 | EE | Jérôme Lemaitre, Sylvain Alliot, Ed F. Deprettere: Requirements for Interfacing IP-Components in Re-configurable Platforms. VLSI Signal Processing 43(2-3): 173-184 (2006) |
| 2005 | ||
| 2 | EE | Jérôme Lemaitre, Sylvain Alliot, Ed F. Deprettere: Behavioral specification of control interface for signal processing applications. ASAP 2005: 43-49 |
| 2004 | ||
| 1 | EE | Jérôme Lemaitre, Sylvain Alliot, Ed F. Deprettere: On the (Re-)Use of IP-Components in Re-configurable Platforms. SAMOS 2004: 264-273 |
| 1 | Sylvain Alliot | [1] [2] [3] |
| 2 | Ed F. Deprettere | [1] [2] [3] [4] |