| |
| 2007 | ||
|---|---|---|
| 1 | EE | Chang-Chun Lee, Chien-Chen Lee, Hsiao-Tung Ku, Shu-Ming Chang, Kuo-Ning Chiang: Solder joints layout design and reliability enhancements of wafer level packaging using response surface methodology. Microelectronics Reliability 47(2-3): 196-204 (2007) |
| 1 | Shu-Ming Chang | [1] |
| 2 | Kuo-Ning Chiang | [1] |
| 3 | Hsiao-Tung Ku | [1] |
| 4 | Chang-Chun Lee | [1] |