Paul D. Kundarewich

2008
3	EE	Taneem Ahmed, Paul D. Kundarewich, Jason Helge Anderson, Brad L. Taylor, Rajat Aggarwal: Architecture-specific packing for virtex-5 FPGAs. FPGA 2008: 5-13
2004
2	EE	Paul D. Kundarewich, Jonathan Rose: Synthetic circuit generation using clustering and iteration. IEEE Trans. on CAD of Integrated Circuits and Systems 23(6): 869-887 (2004)
2003
1	EE	Paul D. Kundarewich, Jonathan Rose: Synthetic circuit generation using clustering and iteration. FPGA 2003: 245

Coauthor Index

1	Rajat Aggarwal	[3]
2	Taneem Ahmed	[3]
3	Jason Helge Anderson	[3]
4	Jonathan Rose	[1] [2]
5	Brad L. Taylor	[3]

Colors in the list of coauthors