Y. Onur Koçberber

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2009

1 EE Yusuf Osmanlioglu, Y. Onur Koçberber, Oguz Ergin: Reducing parity generation latency through input value aware circuits. ACM Great Lakes Symposium on VLSI 2009: 109-112

2009
1	EE	Yusuf Osmanlioglu, Y. Onur Koçberber, Oguz Ergin: Reducing parity generation latency through input value aware circuits. ACM Great Lakes Symposium on VLSI 2009: 109-112

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