2007 |
10 | EE | Jong Suk Lee,
Jae Woon Lee,
Young Hwan Kim:
Symmetric Discharge Logic against Differential Power Analysis.
IEICE Transactions 90-A(1): 234-240 (2007) |
9 | EE | Myung Jin Park,
Hyoun Soo Park,
Young Hwan Kim:
Image Adaptive Incremental Subfield Coding for Plasma Display Panels.
IEICE Transactions 90-C(11): 2100-2104 (2007) |
8 | EE | Kyung Tae Do,
Young Hwan Kim,
Haeng Seon Son:
Timing modeling of latch-controlled sub-systems.
Integration 40(2): 62-73 (2007) |
2006 |
7 | EE | Hyoun Soo Park,
Bong Hyun Lee,
Young Hwan Kim:
Level Converting Flip-Flops for High-Speed and Low-Power Applications.
IEICE Transactions 89-A(6): 1740-1743 (2006) |
6 | EE | Jong Suk Lee,
Bong Seok Kang,
Young Hwan Kim:
Image-Dependent Code Optimization to Improve Motion Picture Quality of Plasma Displays.
IEICE Transactions 89-C(10): 1400-1405 (2006) |
2005 |
5 | EE | Bong Hyun Lee,
Young Hwan Kim,
Kwang-Ok Jeong:
Clock-Free MTCMOS Flip-Flops with High Speed and Low Power.
IEICE Transactions 88-A(6): 1416-1424 (2005) |
2003 |
4 | EE | Chang Sup Sung,
Young Hwan Kim:
Minimizing due date related performance measures on two batch processing machines.
European Journal of Operational Research 147(3): 644-656 (2003) |
2002 |
3 | EE | Chang Sup Sung,
Young Hwan Kim:
Minimizing makespan in a two-machine flowshop with dynamic arrivals allowed.
Computers & OR 29(3): 275-294 (2002) |
1989 |
2 | EE | Young Hwan Kim,
Seung Ho Hwang,
A. Richard Newton:
Electrical-logic simulation and its applications.
IEEE Trans. on CAD of Integrated Circuits and Systems 8(1): 8-22 (1989) |
1986 |
1 | EE | Seung Ho Hwang,
Young Hwan Kim,
A. Richard Newton:
An accuration delay modeling technique for switch-level timing verification.
DAC 1986: 227-233 |