Shunichi Kato
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1984
1
Tohru Sasaki
, Shunichi Kato,
Nobuyoshi Nomizu
,
Hidetoshi Tanaka
: Logic Design Verification Using Automated Test Generation.
ITC 1984
: 88-95
Coauthor
Index
1
Nobuyoshi Nomizu
[
1
]
2
Tohru Sasaki
[
1
]
3
Hidetoshi Tanaka
[
1
]
Copyright ©
Sun May 17 03:24:02 2009 by
Michael Ley
(
ley@uni-trier.de
)
