2007 |
5 | EE | M. Sudhakar,
Ramachandruni Venkata Kamala,
M. B. Srinivas:
A Unified, Reconfigurable Architecture for Montgomery Multiplication in Finite Fields GF(p) and GF(2^n).
VLSI Design 2007: 750-755 |
4 | EE | M. Sudhakar,
Ramachandruni Venkata Kamala,
M. B. Srinivas:
A bit-sliced, scalable and unified montgomery multiplier architecture for RSA and ECC.
VLSI-SoC 2007: 252-257 |
3 | EE | M. Sudhakar,
Ramachandruni Venkata Kamala,
M. B. Srinivas:
New and Improved Architectures for Montgomery Modular Multiplication.
MONET 12(4): 281-291 (2007) |
2006 |
2 | EE | Ramachandruni Venkata Kamala,
M. Sudhakar,
M. B. Srinivas:
An Efficient Reconfigurable Montgomery Multiplier Architecture for GF(n).
DSD 2006: 155-159 |
1 | EE | Ramachandruni Venkata Kamala,
M. B. Srinivas:
High-Throughput Montgomery Modular Multiplication.
VLSI-SoC 2006: 58-62 |