| 2008 |
|---|
| 6 | EE | Christopher T. Johnston,
Donald G. Bailey:
FPGA implementation of a Single Pass Connected Components Algorithm.
DELTA 2008: 228-231 |
| 5 | EE | Christopher T. Johnston,
Paul Lyons,
Donald G. Bailey:
A Visual Notation for Processor and Resource Scheduling.
DELTA 2008: 296-301 |
| 4 | EE | Donald G. Bailey,
Christopher T. Johnston,
Ni Ma:
Connected components analysis of streamed images.
FPL 2008: 679-682 |
| 2006 |
|---|
| 3 | EE | Christopher T. Johnston,
Donald G. Bailey,
Paul J. Lyons:
Towards a visual notation for pipelining in a visual programming language for programming FPGAs.
CHINZ 2006: 1-9 |
| 2 | EE | Donald G. Bailey,
K. T. Gribbon,
Christopher T. Johnston,
Montree Siripruchyanun:
GATOS: A Windowing Operating System for FPGAs.
DELTA 2006: 405-409 |
| 1 | EE | K. T. Gribbon,
Donald G. Bailey,
Christopher T. Johnston:
Using Design Patterns to Overcome Image Processing Constraints on FPGAs.
DELTA 2006: 47-56 |
