2002 | ||
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2 | EE | Zhong-Fang Jin, J.-J. Laurin, Yvon Savaria: A practical approach to model long MIS interconnects in VLSI circuits. IEEE Trans. VLSI Syst. 10(4): 494-507 (2002) |
1999 | ||
1 | EE | Zhong-Fang Jin, J.-J. Laurin, Yvon Savaria, P. Garon: A new approach to analyze interconnect delays in RC wire models. ISCAS (6) 1999: 246-249 |
1 | P. Garon | [1] |
2 | J.-J. Laurin | [1] [2] |
3 | Yvon Savaria | [1] [2] |