2007 |
17 | EE | Hongsong Chen,
Zhenzhou Ji,
Mingzeng Hu,
Fu Zhongchuan,
Jiang Ruixiang:
Design and performance evaluation of a multi-agent-based dynamic lifetime security scheme for AODV routing protocol.
J. Network and Computer Applications 30(1): 145-166 (2007) |
2006 |
16 | EE | Lei Deng,
Wen Gao,
Mingzeng Hu,
Zhenzhou Ji:
A High Efficient Architecture for Motion Estimation Based on AVC/AVS Coding Standard.
Journal of Computer Research and Development 43(11): 1972-1979 (2006) |
15 | EE | Kai-Feng Wang,
Zhenzhou Ji,
Ming-Zeng Hu:
Simultaneous multithreading trace processors: Improving trace processors performance.
Microprocessors and Microsystems 30(2): 102-116 (2006) |
14 | EE | Kai-Feng Wang,
Zhenzhou Ji,
Ming-Zeng Hu:
Boosting SMT trace processors performance with data cache misssensitive thread scheduling mechanism.
Microprocessors and Microsystems 30(5): 225-233 (2006) |
2005 |
13 | EE | Zhiqiang Ma,
Zhenzhou Ji,
Mingzeng Hu,
Yi Ji:
Energy Efficient United L2 Cache Design with Instruction/Data Filter Scheme.
APPT 2005: 52-60 |
12 | EE | Xin Li,
Zhenzhou Ji,
Mingzeng Hu:
Session Table Architecture for Defending SYN Flood Attack.
ICICS 2005: 220-230 |
11 | EE | Xin Li,
Zhenzhou Ji,
Mingzeng Hu:
A Fast and Scalable Conflict Detection Algorithm for Packet Classifiers.
ISPA 2005: 298-307 |
10 | EE | Xin Li,
Zhenzhou Ji,
Ming-Zeng Hu:
Stateful Inspection Firewall Session Table Processing.
ITCC (2) 2005: 615-620 |
9 | EE | Zhi-Yan Cao,
Zhenzhou Ji,
Ming-Zeng Hu:
An Image Sensor Node for Wireless Sensor Networks.
ITCC (2) 2005: 739-745 |
8 | EE | Kai-Feng Wang,
Zhenzhou Ji,
Mingzeng Hu:
Path-based next N trace prefetch in trace processors.
Microprocessors and Microsystems 29(6): 273-288 (2005) |
2004 |
7 | | Deng Lei,
Wen Gao,
Ming-Zeng Hu,
Zhenzhou Ji:
An Efficient VLSI Architecture for MC Interpolation in AVC Video Coding.
ESA/VLSI 2004: 564-568 |
6 | EE | Deng Lei,
Wen Gao,
Ming-Zeng Hu,
Zhenzhou Ji:
An Efficient VLSI Implementation of MC Interpolation for MPEG-4.
IWSOC 2004: 149-152 |
5 | EE | Lei Deng,
Wen Gao,
Ming-Zeng Hu,
Zhenzhou Ji:
An Efficient VLSI Implementation for MC Interpolation of AVS Standard.
PCM (3) 2004: 200-206 |
4 | EE | Lei Deng,
Ming-Zeng Hu,
Zhenzhou Ji:
An Efficient VLSI Architecture of the Sample Interpolation for MPEG-4 Advanced Simple Profile.
PCM (3) 2004: 639-646 |
2003 |
3 | EE | Zhiyang Cao,
Zhenzhou Ji,
Mingzeng Hu:
A VLSI Architecture Design of 1-D DWT.
APPT 2003: 104-108 |
2 | EE | Hongsong Chen,
Zhenzhou Ji,
Mingzeng Hu:
Orthogonal Design Method for Optimal Cache Configuration.
APPT 2003: 172-176 |
1 | EE | Kai-Feng Wang,
Zhenzhou Ji,
Mingzeng Hu:
Simultaneous Multithreading Trace Processors.
APPT 2003: 96-103 |