| |
| 1999 | ||
|---|---|---|
| 2 | EE | Masato Iwabuchi, Noboru Sakamoto, Yasushi Sekine, Takashi Omachi: A methodology to analyze power, voltage drop and their effects on clock skew/delay in early stages of design. ISPD 1999: 9-15 |
| 1995 | ||
| 1 | EE | Mikako Miyama, Goichi Yokomizo, Masato Iwabuchi, Masami Kinoshita: An efficient logic/circuit mixed-mode simulator for analysis of power supply voltage fluctutation. ASP-DAC 1995 |
| 1 | Masami Kinoshita | [1] |
| 2 | Mikako Miyama | [1] |
| 3 | Takashi Omachi | [2] |
| 4 | Noboru Sakamoto | [2] |
| 5 | Yasushi Sekine | [2] |
| 6 | Goichi Yokomizo | [1] |