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Tetsuya Imai

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2004
1 Tetsuya Imai, Masaya Yoshikawa, Hidekazu Terai, Hironori Yamauchi: VLSI processor architecture for real-time GA processing and PE-VLSI design. ISCAS (3) 2004: 625-628

Coauthor Index

1Hidekazu Terai [1]
2Hironori Yamauchi [1]
3Masaya Yoshikawa [1]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)