| |
| 2008 | ||
|---|---|---|
| 11 | EE | Walter Hussak: Decidable Cases of First-order Temporal Logic with Functions. Studia Logica 88(2): 247-261 (2008) |
| 2004 | ||
| 10 | EE | Walter Hussak, Shaun H. Yang: Formal development of remote interfaces for large-scale real-time systems. SMC (1) 2004: 124-129 |
| 9 | EE | Walter Hussak: Serializable histories in quantified propositional temporal logic. Int. J. Comput. Math. 81(10): 1203-1211 (2004) |
| 2000 | ||
| 8 | EE | John A. Keane, Walter Hussak: A Method of Verification in Design. HICSS 2000 |
| 1999 | ||
| 7 | EE | Walter Hussak, John A. Keane: Formal Analysis of Memory Requirements. Requir. Eng. 4(4): 188-197 (1999) |
| 6 | John A. Keane, Walter Hussak: A Design Phase Directed Formal Verification Process. Software Quality Journal 8(4): 255-269 (1999) | |
| 1996 | ||
| 5 | Walter Hussak: On CCS with Parametric Relabelling. Formal Asp. Comput. 8(2): 238-244 (1996) | |
| 4 | Walter Hussak, John A. Keane: Expressing Requirements on a Parallel System Formally. Requir. Eng. 1(4): (1996) | |
| 1995 | ||
| 3 | Walter Hussak, John A. Keane: Concurrency Control of Tiered Flat Transactions. BNCOD 1995: 172-182 | |
| 1994 | ||
| 2 | EE | John A. Keane, Walter Hussak: A Formal Approach to Determining Parallel Resource Bindings: Experience Report. ICSE 1994: 15-22 |
| 1993 | ||
| 1 | Walter Hussak, John A. Keane: Representation of Coherency Classes for Parallel Systems. SPDP 1993: 391-399 | |
| 1 | John A. Keane | [1] [2] [3] [4] [6] [7] [8] |
| 2 | Shaun H. Yang | [10] |