| 1997 |
|---|
| 4 | EE | Youngmin Hur,
Saghir A. Shaikh,
Silvian Goldenberg,
D. Kacprzak,
Stephen A. Szygenda:
Concurrent Fault and Design Error Simulation in Interactive Simulation Automation System.
Annual Simulation Symposium 1997: 168-176 |
| 1996 |
|---|
| 3 | EE | Youngmin Hur,
Stephen A. Szygenda:
A Simulation Tool for Design Error Models Utilizing Error Compression and Sampling.
Annual Simulation Symposium 1996: 212-220 |
| 1995 |
|---|
| 2 | EE | Youngmin Hur,
Stephen A. Szygenda:
Special purpose array processor for digital logic simulation.
Annual Simulation Symposium 1995: 297-302 |
| 1 | | Youngmin Hur,
Stephen A. Szygenda,
E. Scott Fehr,
Granville E. Ott,
Sungho Kang:
Massively Parallel Array Processor for Logic, Fault, and Design Error Simulation.
HPCA 1995: 340-347 |
