| |
| 2006 | ||
|---|---|---|
| 1 | EE | Chingwei Yeh, En-Feng Hsu, Kai-Wen Cheng, Jinn-Shyan Wang, Nai-Jen Chang: An 830mW, 586kbps 1024-bit RSA chip design. DATE Designers' Forum 2006: 24-29 |
| 1 | Nai-Jen Chang | [1] |
| 2 | Kai-Wen Cheng | [1] |
| 3 | Jinn-Shyan Wang | [1] |
| 4 | Chingwei Yeh (Ching-Wei Yeh) | [1] |