| |
| 2005 | ||
|---|---|---|
| 3 | EE | Aurelia De Colle, Sanjay Ramnath, Mokhtar Hirech, Subramanian Chebiyam: Power and Design for Test: A Design Automation Perspective. J. Low Power Electronics 1(1): 73-84 (2005) |
| 2002 | ||
| 2 | EE | Sanjay Ramnath, Frederic Neuveux, Mokhtar Hirech, Felix Ng: Test-model based hierarchical DFT synthesis. ICCAD 2002: 286-293 |
| 1998 | ||
| 1 | EE | Mokhtar Hirech, James Beausang, Xinli Gu: A new approach to scan chain reordering using physical design information. ITC 1998: 348- |
| 1 | James Beausang | [1] |
| 2 | Subramanian Chebiyam | [3] |
| 3 | Aurelia De Colle | [3] |
| 4 | Xinli Gu | [1] |
| 5 | Frederic Neuveux | [2] |
| 6 | Felix Ng | [2] |
| 7 | Sanjay Ramnath | [2] [3] |