| |
| 2005 | ||
|---|---|---|
| 1 | EE | Toshikazu Suzuki, Yoshinobu Yamagami, Ichiro Hatanaka, Akinori Shibayama, Hironori Akamatsu, Hiroyuki Yamauchi: 0.3-1.5 V Embedded SRAM Core with Write-Replica Circuit Using Asymmetrical Memory Cell and Source-Level-Adjusted Direct-Sense-Amplifier. IEICE Transactions 88-C(4): 630-638 (2005) |
| 1 | Hironori Akamatsu | [1] |
| 2 | Akinori Shibayama | [1] |
| 3 | Toshikazu Suzuki | [1] |
| 4 | Yoshinobu Yamagami | [1] |
| 5 | Hiroyuki Yamauchi | [1] |