Tomoaki Hasegawa

2006
3	EE	Haque Mohammad Munirul, Tomoaki Hasegawa, Michitaka Kameyama: Evaluation of Multiple-Valued Packet Multiplexing Scheme for Network-on-Chip Architecture. ISMVL 2006: 6
2005
2	EE	Tomoaki Hasegawa, Yuya Homma, Michitaka Kameyama: Multiple-Valued VLSI Architecture for Intra-Chip Packet Data Transfer. ISMVL 2005: 114-119
1	EE	Haque Mohammad Munirul, Tomoaki Hasegawa, Michitaka Kameyama: Implementation and Evaluation of a Fine-Grain Multiple-Valued Field Programmable VLSI Based on Source-Coupled Logic. ISMVL 2005: 120-125

Coauthor Index

1	Yuya Homma	[2]
2	Michitaka Kameyama	[1] [2] [3]
3	Haque Mohammad Munirul	[1] [3]