2002 | ||
---|---|---|
2 | EE | Rituparna Mandal, Dibyendu Goswami, Arup Dash: Reducing Library Development Cycle Time through an Optimum Layout Create Flow. VLSI Design 2002: 655-660 |
2001 | ||
1 | EE | Sabyasachi Sengupta, Somavalli Ramanathan, Biswadeep Chatterjee, Dibyendu Goswami: Minimizing Area and Maximizing Porosity for Cell Layouts Using Innovative Routing Strategies. VLSI Design 2001: 353-358 |
1 | Biswadeep Chatterjee | [1] |
2 | Arup Dash | [2] |
3 | Rituparna Mandal | [2] |
4 | Somavalli Ramanathan | [1] |
5 | Sabyasachi Sengupta | [1] |