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| 2009 | ||
|---|---|---|
| 2 | EE | Rani S. Ghaida, Payman Zarkesh-Ha: A Layout Sensitivity Model for Estimating Electromigration-vulnerable Narrow Interconnects. J. Electronic Testing 25(1): 67-77 (2009) |
| 2007 | ||
| 1 | EE | Rani S. Ghaida, Payman Zarkesh-Ha: Estimation of Electromigration-Aggravating Narrow Interconnects Using a Layout Sensitivity Model. DFT 2007: 59-67 |
| 1 | Payman Zarkesh-Ha | [1] [2] |