2008 | ||
---|---|---|
2 | EE | Jaime Ramírez-Angulo, Lalitha Mohana Kalyani-Garimella, Annajirao Garimella, Sri Raga Sudha Garimella, Antonio J. López-Martín, Ramón González Carvajal: An Input Stage for the Implementation of Low-Voltage Rail to Rail Offset Compensated CMOS Comparators. VLSI Design 2008: 294-299 |
2003 | ||
1 | EE | Annajirao Garimella, M. V. V. Satyanarayana, R. Satish Kumar, P. S. Murugesh, U. C. Niranjan: VLSI Implementation of Online Digital Watermarking Technique with Difference Encoding for 8-Bit Gray Scale Images. VLSI Design 2003: 283- |