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| 2007 | ||
|---|---|---|
| 2 | EE | Jian Hong Jiang, Weixin Gai, Akira Hattori, Yasuo Hidaka, Takeshi Horie, Yoichi Koyanagi, Hideki Osone: Design Consideration of 6.25 Gbps Signaling for High-Performance Server. ASP-DAC 2007: 854-857 |
| 2003 | ||
| 1 | EE | Xingjun Wu, Hongyi Chen, Yihe Sun, Weixin Gai: A Fully-Pipeline Linear Systolic Architecture for Modular Multiplier in Public-Key Crypto-Systems. VLSI Signal Processing 33(1-2): 191-197 (2003) |
| 1 | Hongyi Chen | [1] |
| 2 | Akira Hattori | [2] |
| 3 | Yasuo Hidaka | [2] |
| 4 | Takeshi Horie | [2] |
| 5 | Jian Hong Jiang | [2] |
| 6 | Yoichi Koyanagi | [2] |
| 7 | Hideki Osone | [2] |
| 8 | Yihe Sun | [1] |
| 9 | Xingjun Wu | [1] |