2008 |
6 | EE | Agustín Ramirez-Agundis,
Rafael Gadea Gironés,
Ricardo José Colom-Palero:
A hardware design of a massive-parallel, modular NN-based vector quantizer for real-time video coding.
Microprocessors and Microsystems - Embedded Hardware Design 32(1): 33-44 (2008) |
2006 |
5 | EE | Ricardo José Colom-Palero,
Rafael Gadea Gironés,
Angel Sebastià-Cortés:
A Novel FPGA Architecture of a 2-D Wavelet Transform.
VLSI Signal Processing 42(3): 273-284 (2006) |
2005 |
4 | EE | Rafael Gadea Gironés,
Ricardo José Colom-Palero,
Joaquín Cerdá-Boluda,
Angel Sebastià-Cortés:
FPGA Implementation of a Pipelined On-Line Backpropagation.
VLSI Signal Processing 40(2): 189-213 (2005) |
2004 |
3 | EE | Marcos Martínez Peiró,
Francisco Ballester,
Guillermo Payá Vayá,
Ricardo José Colom-Palero,
Rafael Gadea Gironés,
J. Belenguer:
FPGA Custom DSP for ECG Signal Analysis and Compression.
FPL 2004: 954-958 |
2 | EE | Ricardo José Colom-Palero,
Rafael Gadea Gironés,
Francisco Ballester,
Marcos Martínez Peiró:
Flexible architecture for the implementation of the two-dimensional discrete wavelet transform (2D-DWT) oriented to FPGA devices.
Microprocessors and Microsystems 28(9): 509-518 (2004) |
2003 |
1 | EE | Rafael Gadea Gironés,
Agustín Ramirez-Agundis,
Joaquín Cerdá-Boluda,
Ricardo José Colom-Palero:
FPGA Implementation of Adaptive Non-linear Predictors for Video Compression.
FPL 2003: 1016-1019 |