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Ricardo José Colom-Palero

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2008
6EEAgustín Ramirez-Agundis, Rafael Gadea Gironés, Ricardo José Colom-Palero: A hardware design of a massive-parallel, modular NN-based vector quantizer for real-time video coding. Microprocessors and Microsystems - Embedded Hardware Design 32(1): 33-44 (2008)
2006
5EERicardo José Colom-Palero, Rafael Gadea Gironés, Angel Sebastià-Cortés: A Novel FPGA Architecture of a 2-D Wavelet Transform. VLSI Signal Processing 42(3): 273-284 (2006)
2005
4EERafael Gadea Gironés, Ricardo José Colom-Palero, Joaquín Cerdá-Boluda, Angel Sebastià-Cortés: FPGA Implementation of a Pipelined On-Line Backpropagation. VLSI Signal Processing 40(2): 189-213 (2005)
2004
3EEMarcos Martínez Peiró, Francisco Ballester, Guillermo Payá Vayá, Ricardo José Colom-Palero, Rafael Gadea Gironés, J. Belenguer: FPGA Custom DSP for ECG Signal Analysis and Compression. FPL 2004: 954-958
2EERicardo José Colom-Palero, Rafael Gadea Gironés, Francisco Ballester, Marcos Martínez Peiró: Flexible architecture for the implementation of the two-dimensional discrete wavelet transform (2D-DWT) oriented to FPGA devices. Microprocessors and Microsystems 28(9): 509-518 (2004)
2003
1EERafael Gadea Gironés, Agustín Ramirez-Agundis, Joaquín Cerdá-Boluda, Ricardo José Colom-Palero: FPGA Implementation of Adaptive Non-linear Predictors for Video Compression. FPL 2003: 1016-1019

Coauthor Index

1Francisco Ballester [2] [3]
2J. Belenguer [3]
3Joaquín Cerdá-Boluda [1] [4]
4Rafael Gadea Gironés [1] [2] [3] [4] [5] [6]
5Marcos Martínez Peiró [2] [3]
6Agustín Ramirez-Agundis [1] [6]
7Angel Sebastià-Cortés [4] [5]
8Guillermo Payá Vayá [3]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)