| |
| 1999 | ||
|---|---|---|
| 5 | Pong P. Chu, Robert E. Jones: Reconfigurable FPGA for Network Performance Evaluation. PDPTA 1999: 1124-1130 | |
| 1997 | ||
| 4 | Pong P. Chu: The impact of beam forming on the performance of an on-board output buffer. Telecommunication Systems 8(2-4): 229-256 (1997) | |
| 1996 | ||
| 3 | EE | Pong P. Chu: A Reprogrammable FPGA-Based ATM Traffic Generator. Great Lakes Symposium on VLSI 1996: 35-38 |
| 1995 | ||
| 2 | EE | Pong P. Chu: ATM burst traffic generator. Great Lakes Symposium on VLSI 1995: 262-265 |
| 1994 | ||
| 1 | Pong P. Chu, Ramana Gottipati: Write Buffer Design for On-Chip Cache. ICCD 1994: 311-316 | |
| 1 | Ramana Gottipati | [1] |
| 2 | Robert E. Jones | [5] |