J. C. Chi

2007
1	EE	J. C. Chi, H. H. Lee, S. H. Tsai, M. C. Chi: Gate Level Multiple Supply Voltage Assignment Algorithm for Power Optimization Under Timing Constraint. IEEE Trans. VLSI Syst. 15(6): 637-648 (2007)

Coauthor Index

1	M. C. Chi	[1]
2	H. H. Lee	[1]
3	S. H. Tsai	[1]