| |
| 2006 | ||
|---|---|---|
| 1 | EE | Michael Hutton, Richard Yuan, Jay Schleicher, Gregg Baeckler, Sammy Cheung, Kar Keng Chua, Hee Kong Phoo: A methodology for FPGA to structured-ASIC synthesis and verification. DATE Designers' Forum 2006: 64-69 |
| 1 | Gregg Baeckler | [1] |
| 2 | Kar Keng Chua | [1] |
| 3 | Michael Hutton (Michael D. Hutton, Mike Hutton) | [1] |
| 4 | Hee Kong Phoo | [1] |
| 5 | Jay Schleicher | [1] |
| 6 | Richard Yuan | [1] |