| |
| 2002 | ||
|---|---|---|
| 3 | EE | Kwan-wai Wong, Chi-Ying Tsui, R. S.-K. Cheng, Wai Ho Mow: A VLSI architecture of a K-best lattice decoding algorithm for MIMO channels. ISCAS (3) 2002: 273-276 |
| 2001 | ||
| 2 | EE | Oliver Yuk-Hang Leung, Chi-Ying Tsui, R. S.-K. Cheng: Reducing power consumption of turbo-code decoder using adaptive iteration with variable supply voltage. IEEE Trans. VLSI Syst. 9(1): 34-41 (2001) |
| 1999 | ||
| 1 | EE | Chi-Ying Tsui, R. S.-K. Cheng, C. Ling: Low power ACS unit design for the Viterbi decoder [CDMA wireless systems]. ISCAS (1) 1999: 137-140 |
| 1 | Oliver Yuk-Hang Leung | [2] |
| 2 | C. Ling | [1] |
| 3 | Wai Ho Mow | [3] |
| 4 | Chi-Ying Tsui | [1] [2] [3] |
| 5 | Kwan-wai Wong | [3] |