| |
| 2003 | ||
|---|---|---|
| 2 | EE | Feng Zhou, Esther Y. Cheng, Bo Yao, Chung-Kuan Cheng, Ronald L. Graham: A hierarchical three-way interconnect architecture for hexagonal processors. SLIP 2003: 133-139 |
| 2002 | ||
| 1 | EE | Esther Y. Cheng, Feng Zhou, Bo Yao, Chung-Kuan Cheng, Ronald L. Graham: Balancing the Interconnect Topology for Arrays of Processors between Cost and Power. ICCD 2002: 180-186 |
| 1 | Chung-Kuan Cheng | [1] [2] |
| 2 | Ronald L. Graham | [1] [2] |
| 3 | Bo Yao | [1] [2] |
| 4 | Feng Zhou | [1] [2] |