Ying-Pei Chen

List of publications from the DBLP Bibliography Server - FAQ

2003

2 EE Chua-Chin Wang, Ya-Hsin Hsueh, Ying-Pei Chen: An area-saving decoder structure for ROMs. IEEE Trans. VLSI Syst. 11(4): 581-589 (2003)

1999

1 EE Chua-Chin Wang, Yu-Tsun Chien, Ying-Pei Chen: A practical load-optimized VCO design for low-jitter 5 V 500 MHz digital phase-locked loop. ISCAS (2) 1999: 528-531

2003
2	EE	Chua-Chin Wang, Ya-Hsin Hsueh, Ying-Pei Chen: An area-saving decoder structure for ROMs. IEEE Trans. VLSI Syst. 11(4): 581-589 (2003)
1999
1	EE	Chua-Chin Wang, Yu-Tsun Chien, Ying-Pei Chen: A practical load-optimized VCO design for low-jitter 5 V 500 MHz digital phase-locked loop. ISCAS (2) 1999: 528-531

Coauthor Index