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Xiaolei Chen

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2008
3EEHanyu Liu, Xiaolei Chen, Yajun Ha: An Area-Efficient Timing-Driven Routing Algorithm for Scalable FPGAs with Time-Multiplexed Interconnects. FCCM 2008: 275-276
2EEHanyu Liu, Xiaolei Chen, Yajun Ha: An architecture and timing-driven routing algorithm for area-efficient FPGAs with time-multiplexed interconnects. FPL 2008: 615-618
1EEShakith Fernando, Xiaolei Chen, Yajun Ha: sFPGA - A scalable switch based FPGA architecture and design methodology. FPL 2008: 95-100

Coauthor Index

1Shakith Fernando [1]
2Yajun Ha [1] [2] [3]
3Hanyu Liu [2] [3]

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