| |
| 2007 | ||
|---|---|---|
| 4 | EE | Xiaoding Chen, Michael S. Hsiao: An Overlapping Scan Architecture for Reducing Both Test Time and Test Power by Pipelining Fault Detection. IEEE Trans. VLSI Syst. 15(4): 404-412 (2007) |
| 2006 | ||
| 3 | EE | Xiaoding Chen, Michael S. Hsiao: Testing Embedded Sequential Cores in Parallel Using Spectrum-Based BIST. IEEE Trans. Computers 55(2): 150-162 (2006) |
| 2003 | ||
| 2 | EE | Xiaoding Chen, Michael S. Hsiao: Energy-Efficient Logic BIST Based on State Correlation Analysis. VTS 2003: 267-272 |
| 2002 | ||
| 1 | EE | Xiaoding Chen, Michael S. Hsiao: Characteristic faults and spectral information for logic BIST. ICCAD 2002: 294-298 |
| 1 | Michael S. Hsiao | [1] [2] [3] [4] |