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Shyh-Jong Chen

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1999
1EEShanq-Jang Ruan, Rung-Ji Shang, Feipei Lai, Shyh-Jong Chen, Xian-Jun Huang: A bipartition-codec architecture to reduce power in pipelined circuits. ICCAD 1999: 84-90

Coauthor Index

1Xian-Jun Huang [1]
2Feipei Lai [1]
3Shanq-Jang Ruan [1]
4Rung-Ji Shang [1]

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