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Chun-Chih Chen

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2006
1EEShanq-Jang Ruan, Edwin Naroska, Chun-Chih Chen: Optimal partitioned fault-tolerant bus layout for reducing power in nanometer designs. ISPD 2006: 114-119

Coauthor Index

1Edwin Naroska [1]
2Shanq-Jang Ruan [1]

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